JP63299296 (Meiko), JP63299297A (Meiko) and “Manufacturing of Printed Wiring Boards by Ultra-high Speed Electroforming” by Norio Kawachi (Meiko) et al, Printed Circuit World Convention, June 1990 describe the use of the electroforming technique in creating circuit boards (printed wiring boards). Electroforming is an additive process that involves obtaining a replica (negative) of a metal carrier by electrolytic deposition of a metallic film using the carrier as a cathode. A patterned photo-resist is used to limit the electro-deposition of material to the exposed areas of the cathode. The documents additionally teach a transfer lamination process in which the deposited metal and photo-resist are laminated to a substrate and the master is removed leaving a deposited metal photo-resist substrate combination. JP63299296 (Meiko), JP63299297A (Meiko) additionally disclose the electrolytic deposition of a copper plate layer on the master before the deposition of the metal. This copper layer is transferred in the transfer-lamination process and is removed by etching.
U.S. Pat. No. 6,284,072 discloses the formation of patterning on a conductive carrier by micro-moulding. An insulating material is embossed to create a pattern that limits the electro-deposition of metal to exposed areas of the conductive carrier.
Many different applications require a cross-over of elongate conductive interconnects. For example, circuitry with a matrix of conductive interconnects, such as matrix display devices, may have thousands or millions of such cross-overs.
In the bulk semi-conductor field, the conductive interconnects are normally separated into different electrically insulated layers of the semiconductor device. Vias through the insulating layers of the device are used to form electrical connection to the conductive interconnects.
In some applications, such as display devices, it is desirable to have a thin device and it is undesirable to separate, into separate electrically insulated layers, the conductive interconnects that cross-over.
It would be desirable to provide a cross-over for conductive interconnects without separating the conductive interconnects into different insulated layers.